#ifndef _MCT8316AREG_H
#define _MCT8316AREG_H

/* *** Algorithm Configuration Registers *** */
#define ISD_CONFIG_ADDR 0x80
#define MOTOR_STARTUP1_ADDR 0x82
#define MOTOR_STARTUP2_ADDR 0x84
#define CLOSED_LOOP1_ADDR 0x86
#define CLOSED_LOOP2_ADDR 0x88
#define CLOSED_LOOP3_ADDR 0x8A
#define CLOSED_LOOP4_ADDR 0x8C
#define CONST_SPEED_ADDR 0x8E
#define CONST_PWR_ADDR 0x90
#define DEG150_TWO_PH_PROFILE_ADDR 0x96
#define DEG150_THREE_PH_PROFILE_ADDR 0x98
#define TRAP_CONFIG1_ADDR 0x9A
#define TRAP_CONFIG2_ADDR 0x9C

/* *** Fault Configuration Registers *** */
#define FAULT_CONFIG1_ADDR 0x92
#define FAULT_CONFIG2_ADDR 0x94

/* *** Hardware Configuration Registers *** */
#define PIN_CONFIG1_ADDR 0xA4
#define PIN_CONFIG2_ADDR 0xA6
#define DEVICE_CONFIG_ADDR 0xA8

/* *** Gate Driver Configuration Registers *** */
#define GD_CONFIG1_ADDR 0xAC
#define GD_CONFIG2_ADDR 0xAE

/* *** Fault Status Registers *** */
#define GATE_DRIVER_FAULT_STATUS_ADDR 0xE0
#define CONTROLLER_FAULT_STATUS_ADDR 0xE2

/* *** System Status Registers *** */
#define SYS_STATUS1_ADDR 0xE4
#define SYS_STATUS2_ADDR 0xEA
#define SYS_STATUS3_ADDR 0xEC

/* *** ALGO_Control Registers *** */
#define ALGO_CTRL1_ADDR 0xE6

/* *** Device Control Registers *** */
#define DEVICE_CTRL_ADDR 0xE8

/* Control Word 0: OP_R/W */
#define OP_W 0
#define OP_R 0x80

/* Control Word 0: CRC_EN */
#define CRC_DIS 0
#define CRC_EN 0x40

/* Control Word 0: DLEN  */
#define DLEN_16 0
#define DLEN_32 0x10
#define DLEN_64 0x20
#define DLEN_RESERVED 0x30

/* *** ISD_CONFIG *** */
/* ISD Enable/Disable */
#define ISD_DIS 0
#define ISD_EN 0x40000000

/* Break Enable/Disable */
#define BREAK_EN 0X20000000
#define BREAK_DIS 0

/* Hi-Z Enable/Disable */
#define HIZ_EN 0x10000000
#define HIZ_DIS 0

/* Reverse Drive Enalbe/Disable */
#define RVS_DR_EN 0x08000000
#define RVS_DR_DIS 0

/* Resynchronization enable/disable */
#define RESYNC_EN 0x04000000
#define RESYNC_DIS 0

/* Enable or disable brake during stationary */
#define STAT_BRK_EN 0x02000000 // Enable or disable brake during stationary
#define STAT_BRK_DIS 0

/* Stationary BEMF detection threshold */
#define STAT_DETECT_THR_5mV 0X00000000   // Stationary BEMF detection threshold (default)
#define STAT_DETECT_THR_10mV 0X00400000  // Stationary BEMF detection threshold 10mV
#define STAT_DETECT_THR_15mV 0X00800000  // Stationary BEMF detection threshold 15mV
#define STAT_DETECT_THR_20mV 0X00C00000  // Stationary BEMF detection threshold 20mV
#define STAT_DETECT_THR_25mV 0X01000000  // Stationary BEMF detection threshold 25mV
#define STAT_DETECT_THR_30mV 0X01400000  // Stationary BEMF detection threshold 30mV
#define STAT_DETECT_THR_50mV 0X01800000  // Stationary BEMF detection threshold 50mV
#define STAT_DETECT_THR_100mV 0X01C00000 // Stationary BEMF detection threshold 100mV

/* *** MOTOR_STARTUP1 *** */
/* Motor Start-up Method */
#define MTR_STARTUP_Align 0x00000000            // Align
#define MTR_STARTUP_DoubleAlign 0x20000000      // Double Align
#define MTR_STARTUP_IPD 0x40000000              // Initial Position Detection
#define MTR_STARTUP_Slow_First_Cycle 0x60000000 // Slow First Cycle

/* 28-25bit Align voltage ramp rate */
#define ALIGN_RAMP_RATE_0d1Vs 0x00000000  // Align ramp rate 0.1V/s
#define ALIGN_RAMP_RATE_0d2Vs 0x02000000  // Align ramp rate 0.2V/s
#define ALIGN_RAMP_RATE_0d5Vs 0x04000000  // Align ramp rate 0.5V/s
#define ALIGN_RAMP_RATE_1Vs 0x06000000    // Align ramp rate 1V/s
#define ALIGN_RAMP_RATE_2d5Vs 0x08000000  // Align ramp rate 2.5V/s
#define ALIGN_RAMP_RATE_5Vs 0x0A000000    // Align ramp rate 5V/s
#define ALIGN_RAMP_RATE_7d5Vs 0x0C000000  // Align ramp rate 7.5V/s
#define ALIGN_RAMP_RATE_10Vs 0x0E000000   // Align ramp rate 10V/s
#define ALIGN_RAMP_RATE_25Vs 0x10000000   // Align ramp rate 25V/s
#define ALIGN_RAMP_RATE_50Vs 0x12000000   // Align ramp rate 50V/s
#define ALIGN_RAMP_RATE_75Vs 0x14000000   // Align ramp rate 75V/s
#define ALIGN_RAMP_RATE_100Vs 0x16000000  // Align ramp rate 100V/s
#define ALIGN_RAMP_RATE_250Vs 0x18000000  // Align ramp rate 250V/s
#define ALIGN_RAMP_RATE_500Vs 0x1A000000  // Align ramp rate 500V/s
#define ALIGN_RAMP_RATE_750Vs 0x1C000000  // Align ramp rate 750V/s
#define ALIGN_RAMP_RATE_1000Vs 0x1E000000 // Align ramp rate 1000V/s

/* 24-21bit Align time */
#define ALIGN_TIME_5ms 0x00000000  // Align time 5ms
#define ALIGN_TIME_10ms 0x00200000 // Align time 10ms
#define ALIGN_TIME_25ms 0x00400000 // Align time 25ms
#define ALIGN_TIME_50ms 0x00600000 // Align time 50ms
#define ALIGN_TIME_75ms 0x00800000 // Align time 75ms
#define ALIGN_TIME_100ms 0x00A00000 // Align time 100ms
#define ALIGN_TIME_200ms 0x00C00000 // Align time 200ms
#define ALIGN_TIME_400ms 0x00E00000 // Align time 400ms
#define ALIGN_TIME_600ms 0x01000000 // Align time 600ms
#define ALIGN_TIME_800ms 0x01200000 // Align time 800ms
#define ALIGN_TIME_1s 0x01400000 // Align time 1s
#define ALIGN_TIME_2s 0x01600000 // Align time 2s
#define ALIGN_TIME_4s 0x01800000 // Align time 4s
#define ALIGN_TIME_6s 0x01A00000 // Align time 6s
#define ALIGN_TIME_8s 0x01C00000 // Align time 8s
#define ALIGN_TIME_10s 0x01E00000 // Align time 10s

/* 20-17bit Align current threshold (Align current threshold (A) = ALIGN_CURR_THR / CSA_GAIN) */
#define ALIGN_CURR_THR_NA 0x00000000   // Align current threshold not applicable
#define ALIGN_CURR_THR_0d1V 0x00020000 // Align current threshold 0.1V
#define ALIGN_CURR_THR_0d2V 0x00040000 // Align current threshold 0.2V
#define ALIGN_CURR_THR_0d3V 0x00060000 // Align current threshold 0.3V
#define ALIGN_CURR_THR_0d4V 0x00080000 // Align current threshold 0.4V
#define ALIGN_CURR_THR_0d5V 0x000A0000 // Align current threshold 0.5V
#define ALIGN_CURR_THR_0d6V 0x000C0000 // Align current threshold 0.6V
#define ALIGN_CURR_THR_0d7V 0x000E0000 // Align current threshold 0.7V
#define ALIGN_CURR_THR_0d8V 0x00100000 // Align current threshold 0.8V
#define ALIGN_CURR_THR_0d9V 0x00120000 // Align current threshold 0.9V
#define ALIGN_CURR_THR_1d0V 0x00140000 // Align current threshold 1.0V
#define ALIGN_CURR_THR_1d1V 0x00160000 // Align current threshold 1.1V
#define ALIGN_CURR_THR_1d2V 0x00180000 // Align current threshold 1.2V
#define ALIGN_CURR_THR_1d3V 0x001A0000 // Align current threshold 1.3V
#define ALIGN_CURR_THR_1d4V 0x001C0000 // Align current threshold 1.4V
#define ALIGN_CURR_THR_1d5V 0x001E0000 // Align current threshold 1.5V

/* 16-14bit IPD clock freqquency */
#define IPD_CLK_FREQ_50Hz 0x00000000  // IPD clock frequency 50Hz
#define IPD_CLK_FREQ_100Hz 0x00004000 // IPD clock frequency 100Hz
#define IPD_CLK_FREQ_250Hz 0x00008000 // IPD clock frequency 250Hz
#define IPD_CLK_FREQ_500Hz 0x0000C000 // IPD clock frequency 500Hz
#define IPD_CLK_FREQ_1kHz 0x00010000  // IPD clock frequency 1kHz
#define IPD_CLK_FREQ_2kHz 0x00014000  // IPD clock frequency 2kHz
#define IPD_CLK_FREQ_5kHz 0x00018000  // IPD clock frequency 5kHz
#define IPD_CLK_FREQ_10kHz 0x0001C000 // IPD clock frequency 10kHz

/* 13-10bit IPD current threshold (IPD current threshold (A) = IPD_CURR_THR / CSA_GAIN) */
#define IPD_CURR_THR_NA 0x00000000   // IPD current threshold not applicable
#define IPD_CURR_THR_0d1V 0x00002000 // IPD current threshold 0.1V
#define IPD_CURR_THR_0d2V 0x00004000 // IPD current threshold 0.2V
#define IPD_CURR_THR_0d3V 0x00006000 // IPD current threshold 0.3V
#define IPD_CURR_THR_0d4V 0x00008000 // IPD current threshold 0.4V
#define IPD_CURR_THR_0d5V 0x0000A000 // IPD current threshold 0.5V
#define IPD_CURR_THR_0d6V 0x0000C000 // IPD current threshold 0.6V
#define IPD_CURR_THR_0d7V 0x0000E000 // IPD current threshold 0.7V
#define IPD_CURR_THR_0d8V 0x00010000 // IPD current threshold 0.8V
#define IPD_CURR_THR_0d9V 0x00012000 // IPD current threshold 0.9V
#define IPD_CURR_THR_1d0V 0x00014000 // IPD current threshold 1.0V
#define IPD_CURR_THR_1d1V 0x00016000 // IPD current threshold 1.1V
#define IPD_CURR_THR_1d2V 0x00018000 // IPD current threshold 1.2V
#define IPD_CURR_THR_1d3V 0x0001A000 // IPD current threshold 1.3V
#define IPD_CURR_THR_1d4V 0x0001C000 // IPD current threshold 1.4V
#define IPD_CURR_THR_1d5V 0x0001E000 // IPD current threshold 1.5V

/* 9-8bit IPD release mode */
#define IPD_RLS_MODE_Brake 0x00000000 // IPD release mode Brake
#define IPD_RLS_MODE_Tristate 0x00000100   // IPD release mode Tristate
#define IPD_RLS_MODE_NA 0x00000200        // IPD release mode NA

/* 7-6bit IPD advance angle */
#define IPD_ADV_ANGLE_0_DEG 0x00000000 // IPD advance angle 0 degree
#define IPD_ADV_ANGLE_30_DEG 0x00000040 // IPD advance angle 30 degree
#define IPD_ADV_ANGLE_60_DEG 0x00000080 // IPD advance angle 60 degree
#define IPD_ADV_ANGLE_90_DEG 0x000000C0 // IPD advance angle 90 degree

/* 5-4bit Number of times IPD is executed */
#define IPD_REPEAT_1 0x00000000 // Number of times IPD is executed 1
#define IPD_REPEAT_2 0x00000010 // Number of times IPD is executed 2
#define IPD_REPEAT_3 0x00000020 // Number of times IPD is executed 3
#define IPD_REPEAT_4 0x00000030 // Number of times IPD is executed 4

/* 3-0bit Frequency of first cycle */
#define SLOW_FIRST_CYC_FREQ_0d05Hz 0x00000000 // Slow first cycle frequency 0.05Hz
#define SLOW_FIRST_CYC_FREQ_0d1Hz 0x00000001  // Slow first cycle frequency 0.1Hz
#define SLOW_FIRST_CYC_FREQ_0d25Hz 0x00000002 // Slow first cycle frequency 0.25Hz
#define SLOW_FIRST_CYC_FREQ_0d5Hz 0x00000003  // Slow first cycle frequency 0.5Hz
#define SLOW_FIRST_CYC_FREQ_1Hz 0x00000004   // Slow first cycle frequency 1Hz
#define SLOW_FIRST_CYC_FREQ_2Hz 0x00000005 // Slow first cycle frequency 2Hz
#define SLOW_FIRST_CYC_FREQ_3Hz 0x00000006 // Slow first cycle frequency 3Hz
#define SLOW_FIRST_CYC_FREQ_5Hz 0x00000007 // Slow first cycle frequency 5Hz
#define SLOW_FIRST_CYC_FREQ_10Hz 0x00000008 // Slow first cycle frequency 10Hz
#define SLOW_FIRST_CYC_FREQ_15Hz 0x00000009 // Slow first cycle frequency 15Hz
#define SLOW_FIRST_CYC_FREQ_25Hz 0x0000000B // Slow first cycle frequency 25Hz
#define SLOW_FIRST_CYC_FREQ_50Hz 0x0000000C // Slow first cycle frequency 50Hz
#define SLOW_FIRST_CYC_FREQ_100Hz 0x0000000D // Slow first cycle frequency 100Hz
#define SLOW_FIRST_CYC_FREQ_150Hz 0x0000000E // Slow first cycle frequency 150Hz
#define SLOW_FIRST_CYC_FREQ_200Hz 0x0000000F // Slow first cycle frequency 200Hz

/* *** MOTOR_STARTUP2 *** */
/* 30bit Open loop current limit configuration */
#define OL_ILIMIT_CONFIG 0x00000000 // Open loop current limit configuration by OL_Limit
#define ILIMIT_CONFIG 0x40000000    // Open loop current limit configuration by ILimit

/* 29-27bit Duty cycle limit during open loop */
#define OL_DUTY_LIMIT_10 0x00000000  // Duty cycle limit during open loop 10%
#define OL_DUTY_LIMIT_15 0x08000000  // Duty cycle limit during open loop 15%
#define OL_DUTY_LIMIT_20 0x10000000  // Duty cycle limit during open loop 20%
#define OL_DUTY_LIMIT_25 0x18000000  // Duty cycle limit during open loop 25%
#define OL_DUTY_LIMIT_30 0x20000000  // Duty cycle limit during open loop 30%
#define OL_DUTY_LIMIT_40 0x28000000  // Duty cycle limit during open loop 40%
#define OL_DUTY_LIMIT_50 0x30000000  // Duty cycle limit during open loop 50%
#define OL_DUTY_LIMIT_100 0x38000000 // Duty cycle limit during open loop 100%

/* 26-23bit Open loop current limit (OL current threshold (A) = OL_CURR_THR / CSA_GAIN)*/
#define OL_ILIMIT_NA 0x00000000   // Open loop current threshold not applicable
#define OL_ILIMIT_0d1V 0x00800000 // Open loop current threshold 0.1V
#define OL_ILIMIT_0d2V 0x01000000 // Open loop current threshold 0.2V
#define OL_ILIMIT_0d3V 0x01800000 // Open loop current threshold 0.3V
#define OL_ILIMIT_0d4V 0x02000000 // Open loop current threshold 0.4V
#define OL_ILIMIT_0d5V 0x02800000 // Open loop current threshold 0.5V
#define OL_ILIMIT_0d6V 0x03000000 // Open loop current threshold 0.6V
#define OL_ILIMIT_0d7V 0x03800000 // Open loop current threshold 0.7V
#define OL_ILIMIT_0d8V 0x04000000 // Open loop current threshold 0.8V
#define OL_ILIMIT_0d9V 0x04800000 // Open loop current threshold 0.9V
#define OL_ILIMIT_1d0V 0x05000000 // Open loop current threshold 1.0V
#define OL_ILIMIT_1d1V 0x05800000 // Open loop current threshold 1.1V
#define OL_ILIMIT_1d2V 0x06000000 // Open loop current threshold 1.2V
#define OL_ILIMIT_1d3V 0x06800000 // Open loop current threshold 1.3V
#define OL_ILIMIT_1d4V 0x07000000 // Open loop current threshold 1.4V
#define OL_ILIMIT_1d5V 0x07800000 // Open loop current threshold 1.5V

/* 22-18bit Open loop acceleration A1 */
#define OL_ACC_A1_0d005Hzs 0x00000000 // Open loop acceleration A1 0.005Hz/s
#define OL_ACC_A1_0d01Hzs 0x00040000  // Open loop acceleration A1 0.01Hz/s
#define OL_ACC_A1_0d025Hzs 0x00080000 // Open loop acceleration A1 0.025Hz/s
#define OL_ACC_A1_0d05Hzs 0x000C0000  // Open loop acceleration A1 0.05Hz/s
#define OL_ACC_A1_0d1Hzs 0x00100000   // Open loop acceleration A1 0.1Hz/s
#define OL_ACC_A1_0d25Hzs 0x00140000  // Open loop acceleration A1 0.25Hz/s
#define OL_ACC_A1_0d5Hzs 0x00180000   // Open loop acceleration A1 0.5Hz/s
#define OL_ACC_A1_1Hzs 0x001C0000     // Open loop acceleration A1 1Hz/s
#define OL_ACC_A1_2d5Hzs 0x00200000   // Open loop acceleration A1 2.5Hz/s
#define OL_ACC_A1_5Hzs 0x00240000     // Open loop acceleration A1 5Hz/s
#define OL_ACC_A1_7d5Hzs 0x00280000   // Open loop acceleration A1 7.5Hz/s
#define OL_ACC_A1_10Hzs 0x002C0000    // Open loop acceleration A1 10Hz/s
#define OL_ACC_A1_12d5Hzs 0x00300000  // Open loop acceleration A1 12.5Hz/s
#define OL_ACC_A1_15Hzs 0x00340000    // Open loop acceleration A1 15Hz/s
#define OL_ACC_A1_20Hzs 0x00380000    // Open loop acceleration A1 20Hz/s
#define OL_ACC_A1_30Hzs 0x003C0000    // Open loop acceleration A1 30Hz/s
#define OL_ACC_A1_40Hzs 0x00400000    // Open loop acceleration A1 40Hz/s
#define OL_ACC_A1_50Hzs 0x00440000    // Open loop acceleration A1 50Hz/s
#define OL_ACC_A1_60Hzs 0x00480000    // Open loop acceleration A1 60Hz/s
#define OL_ACC_A1_75Hzs 0x004C00000   // Open loop acceleration A1 75Hz/s
#define OL_ACC_A1_100Hzs 0x00500000   // Open loop acceleration A1 100Hz/s
#define OL_ACC_A1_125Hzs 0x00540000   // Open loop acceleration A1 125Hz/s
#define OL_ACC_A1_150Hzs 0x00580000   // Open loop acceleration A1 150Hz/s
#define OL_ACC_A1_175Hzs 0x005C00000  // Open loop acceleration A1 175Hz/s
#define OL_ACC_A1_200Hzs 0x00600000   // Open loop acceleration A1 200Hz/s
#define OL_ACC_A1_250Hzs 0x00640000   // Open loop acceleration A1 250Hz/s
#define OL_ACC_A1_300Hzs 0x00680000   // Open loop acceleration A1 300Hz/s
#define OL_ACC_A1_400Hzs 0x006C00000  // Open loop acceleration A1 400Hz/s
#define OL_ACC_A1_500Hzs 0x00700000   // Open loop acceleration A1 500Hz/s
#define OL_ACC_A1_750Hzs 0x00740000   // Open loop acceleration A1 750Hz/s
#define OL_ACC_A1_1000Hzs 0x00780000  // Open loop acceleration A1 1000Hz/s
#define OL_ACC_A1_No_Limit 0x007C0000 // Open loop acceleration A1 No Limit

/* 17-13bit Open loop acceleration A2 */
#define OL_ACC_A2_0d005Hzs2 0x00000000 // Open loop acceleration A2 0.005Hz/(s^2)
#define OL_ACC_A2_0d01Hzs2 0x00002000  // Open loop acceleration A2 0.01Hz/(s^2)
#define OL_ACC_A2_0d025Hzs2 0x00004000 // Open loop acceleration A2 0.025Hz/(s^2)
#define OL_ACC_A2_0d05Hzs2 0x00006000  // Open loop acceleration A2 0.05Hz/(s^2)
#define OL_ACC_A2_0d1Hzs2 0x00008000   // Open loop acceleration A2 0.1Hz/(s^2)
#define OL_ACC_A2_0d25Hzs2 0x0000A000  // Open loop acceleration A2 0.25Hz/(s^2)
#define OL_ACC_A2_0d5Hzs2 0x0000C000   // Open loop acceleration A2 0.5Hz/(s^2)
#define OL_ACC_A2_1Hzs2 0x0000E000     // Open loop acceleration A2 1Hz/(s^2)
#define OL_ACC_A2_2d5Hzs2 0x00010000   // Open loop acceleration A2 2.5Hz/(s^2)
#define OL_ACC_A2_5Hzs2 0x00012000     // Open loop acceleration A2 5Hz/(s^2)
#define OL_ACC_A2_7d5Hzs2 0x00014000   // Open loop acceleration A2 7.5Hz/(s^2)
#define OL_ACC_A2_10Hzs2 0x00016000    // Open loop acceleration A2 10Hz/(s^2)
#define OL_ACC_A2_12d5Hzs2 0x00018000  // Open loop acceleration A2 12.5Hz/(s^2)
#define OL_ACC_A2_15Hzs2 0x0001A000    // Open loop acceleration A2 15Hz/(s^2)
#define OL_ACC_A2_20Hzs2 0x0001C000    // Open loop acceleration A2 20Hz/(s^2)
#define OL_ACC_A2_30Hzs2 0x0001E000    // Open loop acceleration A2 30Hz/(s^2)
#define OL_ACC_A2_40Hzs2 0x00020000    // Open loop acceleration A2 40Hz/(s^2)
#define OL_ACC_A2_50Hzs2 0x00022000    // Open loop acceleration A2 50Hz/(s^2)
#define OL_ACC_A2_60Hzs2 0x00024000    // Open loop acceleration A2 60Hz/(s^2)
#define OL_ACC_A2_75Hzs2 0x00026000    // Open loop acceleration A2 75Hz/(s^2)
#define OL_ACC_A2_100Hzs2 0x00028000   // Open loop acceleration A2 100Hz/(s^2)
#define OL_ACC_A2_125Hzs2 0x0002A000   // Open loop acceleration A2 125Hz/(s^2)
#define OL_ACC_A2_150Hzs2 0x0002C000   // Open loop acceleration A2 150Hz/(s^2)
#define OL_ACC_A2_175Hzs2 0x0002E000   // Open loop acceleration A2 175Hz/(s^2)
#define OL_ACC_A2_200Hzs2 0x00030000   // Open loop acceleration A2 200Hz/(s^2)
#define OL_ACC_A2_250Hzs2 0x00032000   // Open loop acceleration A2 250Hz/(s^2)
#define OL_ACC_A2_300Hzs2 0x00034000   // Open loop acceleration A2 300Hz/(s^2)
#define OL_ACC_A2_400Hzs2 0x00036000   // Open loop acceleration A2 400Hz/(s^2)
#define OL_ACC_A2_500Hzs2 0x00038000   // Open loop acceleration A2 500Hz/(s^2)
#define OL_ACC_A2_750Hzs2 0x0003A000   // Open loop acceleration A2 750Hz/(s^2)
#define OL_ACC_A2_1000Hzs2 0x0003C000  // Open loop acceleration A2 1000Hz/(s^2)
#define OL_ACC_A2_No_Limit 0x0003E000  // Open loop acceleration A2 No Limit

/* 12-8bit Open to closed loop handoff threshold */
#define OPN_CL_HANDOFF_THR_1Hz 0x00000000  // Open to closed loop handoff threshold 1Hz
#define OPN_CL_HANDOFF_THR_4Hz 0x00000100  // Open to closed loop handoff threshold 4Hz
#define OPN_CL_HANDOFF_THR_8Hz 0x00000200  // Open to closed loop handoff threshold 8Hz
#define OPN_CL_HANDOFF_THR_12Hz 0x00000300 // Open to closed loop handoff threshold 12Hz
#define OPN_CL_HANDOFF_THR_16Hz 0x00000400 // Open to closed loop handoff threshold 16Hz
#define OPN_CL_HANDOFF_THR_20Hz 0x00000500 // Open to closed loop handoff threshold 20Hz
#define OPN_CL_HANDOFF_THR_24Hz 0x00000600 // Open to closed loop handoff threshold 24Hz
#define OPN_CL_HANDOFF_THR_28Hz 0x00000700 // Open to closed loop handoff threshold 28Hz
#define OPN_CL_HANDOFF_THR_32Hz 0x00000800 // Open to closed loop handoff threshold 32Hz
#define OPN_CL_HANDOFF_THR_36Hz 0x00000900 // Open to closed loop handoff threshold 36Hz
#define OPN_CL_HANDOFF_THR_40Hz 0x00000A00 // Open to closed loop handoff threshold 40Hz
#define OPN_CL_HANDOFF_THR_45Hz 0x00000B00 // Open to closed loop handoff threshold 45Hz
#define OPN_CL_HANDOFF_THR_50Hz 0x00000C00 // Open to closed loop handoff threshold 50Hz
#define OPN_CL_HANDOFF_THR_55Hz 0x00000D00 // Open to closed loop handoff threshold 55Hz
#define OPN_CL_HANDOFF_THR_60Hz 0x00000E00 // Open to closed loop handoff threshold 60Hz
#define OPN_CL_HANDOFF_THR_65Hz 0x00000F00 // Open to closed loop handoff threshold 65Hz
#define OPN_CL_HANDOFF_THR_70Hz 0x00001000 // Open to closed loop handoff threshold 70Hz
#define OPN_CL_HANDOFF_THR_75Hz 0x00001100 // Open to closed loop handoff threshold 75Hz
#define OPN_CL_HANDOFF_THR_80Hz 0x00001200 // Open to closed loop handoff threshold 80Hz
#define OPN_CL_HANDOFF_THR_85Hz 0x00001300 // Open to closed loop handoff threshold 85Hz
#define OPN_CL_HANDOFF_THR_90Hz 0x00001400 // Open to closed loop handoff threshold 90Hz
#define OPN_CL_HANDOFF_THR_100Hz 0x00001500 // Open to closed loop handoff threshold 100Hz
#define OPN_CL_HANDOFF_THR_150Hz 0x00001600 // Open to closed loop handoff threshold 150Hz
#define OPN_CL_HANDOFF_THR_200Hz 0x00001700 // Open to closed loop handoff threshold 200Hz
#define OPN_CL_HANDOFF_THR_250Hz 0x00001800 // Open to closed loop handoff threshold 250Hz
#define OPN_CL_HANDOFF_THR_300Hz 0x00001900 // Open to closed loop handoff threshold 300Hz
#define OPN_CL_HANDOFF_THR_350Hz 0x00001A00 // Open to closed loop handoff threshold 350Hz
#define OPN_CL_HANDOFF_THR_400Hz 0x00001B00 // Open to closed loop handoff threshold 400Hz
#define OPN_CL_HANDOFF_THR_450Hz 0x00001C00 // Open to closed loop handoff threshold 450Hz
#define OPN_CL_HANDOFF_THR_500Hz 0x00001D00 // Open to closed loop handoff threshold 500Hz
#define OPN_CL_HANDOFF_THR_550Hz 0x00001E00 // Open to closed loop handoff threshold 550Hz
#define OPN_CL_HANDOFF_THR_600Hz 0x00001F00 // Open to closed loop handoff threshold 600Hz

/* 7bit Auto handoff enable */
#define AUTO_HANDOFF_EN 0x00000080 // Auto handoff enable
#define AUTO_HANDOFF_DIS 0         // Auto handoff disable

/* 6bit First cycle frequency select */
#define FIRST_CYCLE_FREQ_SEL_SLOW 0x00000000  // Defined by SLOW_FIRST_CYC_FREQ
#define FIRST_CYCLE_FREQ_SEL_0Hz 0x00000020   // 0Hz

/* 5-2bit Min operational duty cycle */
#define MIN_DUTY_1d5 0x00000000  // Minimum operational duty cycle 1.5%
#define MIN_DUTY_2 0x00000004    // Minimum operational duty cycle 2%
#define MIN_DUTY_3 0x00000008    // Minimum operational duty cycle 3%
#define MIN_DUTY_4 0x0000000C    // Minimum operational duty cycle 4%
#define MIN_DUTY_5 0x00000010    // Minimum operational duty cycle 5%
#define MIN_DUTY_6 0x00000014    // Minimum operational duty cycle 6%
#define MIN_DUTY_7 0x00000018    // Minimum operational duty cycle 7%
#define MIN_DUTY_8 0x0000001C    // Minimum operational duty cycle 8%
#define MIN_DUTY_9 0x00000020    // Minimum operational duty cycle 9%
#define MIN_DUTY_10 0x00000024   // Minimum operational duty cycle 10%
#define MIN_DUTY_12 0x00000028   // Minimum operational duty cycle 12%
#define MIN_DUTY_15 0x0000002C   // Minimum operational duty cycle 15%
#define MIN_DUTY_17d5 0x00000030 // Minimum operational duty cycle 17.5%
#define MIN_DUTY_20 0x00000034   // Minimum operational duty cycle 20%
#define MIN_DUTY_25 0x00000038   // Minimum operational duty cycle 25%
#define MIN_DUTY_30 0x0000003C   // Minimum operational duty cycle 30%

/* *** CLOSED_LOOP1 *** */
/* 30-29bit Trapezoidal commutation mode */
#define COMM_CONTROL_120DEG 0x00000000     // 120 degree commutation
#define COMM_CONTROL_120_150DEG 0x20000000 // Variable commutation between 120° and 150°
#define COMM_CONTROL_NA 0x40000000         // Not applicable

/* 28-24bit Closed loop acceleration rate */
#define CL_ACC_0d005Vs 0x00000000  // Closed loop acceleration rate 0.005V/s
#define CL_ACC_0d01Vs 0x01000000   // Closed loop acceleration rate 0.01V/s
#define CL_ACC_0d025Vs 0x02000000  // Closed loop acceleration rate 0.025V/s
#define CL_ACC_0d05Vs 0x03000000   // Closed loop acceleration rate 0.05V/s
#define CL_ACC_0d1Vs 0x04000000    // Closed loop acceleration rate 0.1V/s
#define CL_ACC_0d25Vs 0x05000000   // Closed loop acceleration rate 0.25V/s
#define CL_ACC_0d5Vs 0x06000000    // Closed loop acceleration rate 0.5V/s
#define CL_ACC_1Vs 0x07000000      // Closed loop acceleration rate 1V/s
#define CL_ACC_2d5Vs 0x08000000    // Closed loop acceleration rate 2.5V/s
#define CL_ACC_5Vs 0x09000000      // Closed loop acceleration rate 5V/s
#define CL_ACC_7d5Vs 0x0A000000    // Closed loop acceleration rate 7.5V/s
#define CL_ACC_10Vs 0x0B000000     // Closed loop acceleration rate 10V/s
#define CL_ACC_12d5Vs 0x0C000000   // Closed loop acceleration rate 12.5V/s
#define CL_ACC_15Vs 0x0D000000     // Closed loop acceleration rate 15V/s
#define CL_ACC_20Vs 0x0E000000     // Closed loop acceleration rate 20V/s
#define CL_ACC_30Vs 0x0F000000     // Closed loop acceleration rate 30V/s
#define CL_ACC_40Vs 0x10000000     // Closed loop acceleration rate 40V/s
#define CL_ACC_50Vs 0x11000000     // Closed loop acceleration rate 50V/s
#define CL_ACC_60Vs 0x12000000     // Closed loop acceleration rate 60V/s
#define CL_ACC_75Vs 0x13000000     // Closed loop acceleration rate 75V/s
#define CL_ACC_100Vs 0x14000000    // Closed loop acceleration rate 100V/s
#define CL_ACC_125Vs 0x15000000    // Closed loop acceleration rate 125V/s
#define CL_ACC_150Vs 0x16000000    // Closed loop acceleration rate 150V/s
#define CL_ACC_175Vs 0x17000000    // Closed loop acceleration rate 175V/s
#define CL_ACC_200Vs 0x18000000    // Closed loop acceleration rate 200V/s
#define CL_ACC_250Vs 0x19000000    // Closed loop acceleration rate 250V/s
#define CL_ACC_300Vs 0x1A000000    // Closed loop acceleration rate 300V/s
#define CL_ACC_400Vs 0x1B000000    // Closed loop acceleration rate 400V/s
#define CL_ACC_500Vs 0x1C000000    // Closed loop acceleration rate 500V/s
#define CL_ACC_750Vs 0x1D000000    // Closed loop acceleration rate 750V/s
#define CL_ACC_1000Vs 0x1E000000   // Closed loop acceleration rate 1000V/s
#define CL_ACC_No_Limit 0x1F000000 // Closed loop acceleration rate No Limit

/* 22-18bit  Closed loop deceleration rate */
#define CL_DEC_0d005Vs 0x00000000  // Closed loop deceleration rate 0.005V/s
#define CL_DEC_0d01Vs 0x00040000   // Closed loop deceleration rate 0.01V/s
#define CL_DEC_0d025Vs 0x00080000  // Closed loop deceleration rate 0.025V/s
#define CL_DEC_0d05Vs 0x000C0000   // Closed loop deceleration rate 0.05V/s
#define CL_DEC_0d1Vs 0x00100000    // Closed loop deceleration rate 0.1V/s
#define CL_DEC_0d25Vs 0x00140000   // Closed loop deceleration rate 0.25V/s
#define CL_DEC_0d5Vs 0x00180000    // Closed loop deceleration rate 0.5V/s
#define CL_DEC_1Vs 0x001C0000      // Closed loop deceleration rate 1V/s
#define CL_DEC_2d5Vs 0x00200000    // Closed loop deceleration rate 2.5V/s
#define CL_DEC_5Vs 0x00240000      // Closed loop deceleration rate 5V/s
#define CL_DEC_7d5Vs 0x00280000    // Closed loop deceleration rate 7.5V/s
#define CL_DEC_10Vs 0x002C0000     // Closed loop deceleration rate 10V/s
#define CL_DEC_12d5Vs 0x00300000   // Closed loop deceleration rate 12.5V/s
#define CL_DEC_15Vs 0x00340000     // Closed loop deceleration rate 15V/s
#define CL_DEC_20Vs 0x00380000     // Closed loop deceleration rate 20V/s
#define CL_DEC_30Vs 0x003C0000     // Closed loop deceleration rate 30V/s
#define CL_DEC_40Vs 0x00400000     // Closed loop deceleration rate 40V/s
#define CL_DEC_50Vs 0x00440000     // Closed loop deceleration rate 50V/s
#define CL_DEC_60Vs 0x00480000     // Closed loop deceleration rate 60V/s
#define CL_DEC_75Vs 0x004C00000    // Closed loop deceleration rate 75V/s
#define CL_DEC_100Vs 0x00500000    // Closed loop deceleration rate 100V/s
#define CL_DEC_125Vs 0x00540000    // Closed loop deceleration rate 125V/s
#define CL_DEC_150Vs 0x00580000    // Closed loop deceleration rate 150V/s
#define CL_DEC_175Vs 0x005C00000   // Closed loop deceleration rate 175V/s
#define CL_DEC_200Vs 0x00600000    // Closed loop deceleration rate 200V/s
#define CL_DEC_250Vs 0x00640000    // Closed loop deceleration rate 250V/s
#define CL_DEC_300Vs 0x00680000    // Closed loop deceleration rate 300V/s
#define CL_DEC_400Vs 0x006C00000   // Closed loop deceleration rate 400V/s
#define CL_DEC_500Vs 0x00700000    // Closed loop deceleration rate 500V/s
#define CL_DEC_750Vs 0x00740000    // Closed loop deceleration rate 750V/s
#define CL_DEC_1000Vs 0x00780000   // Closed loop deceleration rate 1000V/s
#define CL_DEC_No_Limit 0x007C0000 // Closed loop deceleration rate No Limit

/* 17-13bit Output PWM switching frequency */
#define PWM_FREQ_OUT_5k 0x00000000   // PWM switching frequency 5kHz
#define PWM_FREQ_OUT_6k 0x00002000   // PWM switching frequency 6kHz
#define PWM_FREQ_OUT_7k 0x00004000   // PWM switching frequency 7kHz
#define PWM_FREQ_OUT_8k 0x00006000   // PWM switching frequency 8kHz
#define PWM_FREQ_OUT_9k 0x00008000   // PWM switching frequency 9kHz
#define PWM_FREQ_OUT_10k 0x0000A000  // PWM switching frequency 10kHz
#define PWM_FREQ_OUT_11k 0x0000C000  // PWM switching frequency 11kHz
#define PWM_FREQ_OUT_12k 0x0000E000  // PWM switching frequency 12kHz
#define PWM_FREQ_OUT_13k 0x00010000  // PWM switching frequency 13kHz
#define PWM_FREQ_OUT_14k 0x00012000  // PWM switching frequency 14kHz
#define PWM_FREQ_OUT_15k 0x00014000  // PWM switching frequency 15kHz
#define PWM_FREQ_OUT_16k 0x00016000  // PWM switching frequency 16kHz
#define PWM_FREQ_OUT_17k 0x00018000  // PWM switching frequency 17kHz
#define PWM_FREQ_OUT_18k 0x0001A000  // PWM switching frequency 18kHz
#define PWM_FREQ_OUT_19k 0x0001C000  // PWM switching frequency 19kHz
#define PWM_FREQ_OUT_20k 0x0001E000  // PWM switching frequency 20kHz
#define PWM_FREQ_OUT_25k 0x00020000  // PWM switching frequency 25kHz
#define PWM_FREQ_OUT_30k 0x00022000  // PWM switching frequency 30kHz
#define PWM_FREQ_OUT_35k 0x00024000  // PWM switching frequency 35kHz
#define PWM_FREQ_OUT_40k 0x00026000  // PWM switching frequency 40kHz
#define PWM_FREQ_OUT_45k 0x00028000  // PWM switching frequency 45kHz
#define PWM_FREQ_OUT_50k 0x0002A000  // PWM switching frequency 50kHz
#define PWM_FREQ_OUT_55k 0x0002C000  // PWM switching frequency 55kHz
#define PWM_FREQ_OUT_60k 0x0002E000  // PWM switching frequency 60kHz
#define PWM_FREQ_OUT_65k 0x00030000  // PWM switching frequency 65kHz
#define PWM_FREQ_OUT_70k 0x00032000  // PWM switching frequency 70kHz
#define PWM_FREQ_OUT_75k 0x00034000  // PWM switching frequency 75kHz
#define PWM_FREQ_OUT_80k 0x00036000  // PWM switching frequency 80kHz
#define PWM_FREQ_OUT_85k 0x00038000  // PWM switching frequency 85kHz
#define PWM_FREQ_OUT_90k 0x0003A000  // PWM switching frequency 90kHz
#define PWM_FREQ_OUT_95k 0x0003C000  // PWM switching frequency 95kHz
#define PWM_FREQ_OUT_100k 0x0003E000 // PWM switching frequency 100kHz

/* 9bit Polarity of applied lead angle */
#define LD_ANGLE_POLARITY_POSITIVE 0x00000200 // Positive polarity of applied lead angle
#define LD_ANGLE_POLARITY_NEGATIVE 0x00000000 // Negative polarity of applied lead angle

/* *** CLOSED_LOOP2 *** */
/* 30-29bit FG mode select */
#define FG_SEL_OPENLOOP_AND_CLOSEDLOOP 0x00000000 // Open loop and closed loop
#define FG_SEL_CLOSEDLOOP_ONLY 0x20000000         // Closed loop only
#define FG_SEL_OPENLOOP_ONLY 0x40000000           // Open loop only
#define FG_SEL_NA 0x60000000                      // Not applicable

/* 28-25bit FG division factor */
#define FG_DIV_FACTOR_13 0x00000000 // 2-pole motor mechanical speed/3
#define FG_DIV_FACTOR_1 0x02000000  // 2-pole motor mechanical speed
#define FG_DIV_FACTOR_2 0x04000000  // 4-pole motor mechanical speed
#define FG_DIV_FACTOR_3 0x06000000  // 6-pole motor mechanical speed
#define FG_DIV_FACTOR_4 0x08000000  // 8-pole motor mechanical speed
#define FG_DIV_FACTOR_5 0x0A000000  // 10-pole motor mechanical speed
#define FG_DIV_FACTOR_6 0x0C000000  // 12-pole motor mechanical speed
#define FG_DIV_FACTOR_7 0x0E000000  // 14-pole motor mechanical speed
#define FG_DIV_FACTOR_8 0x10000000  // 16-pole motor mechanical speed
#define FG_DIV_FACTOR_9 0x12000000  // 18-pole motor mechanical speed
#define FG_DIV_FACTOR_10 0x14000000 // 20-pole motor mechanical speed
#define FG_DIV_FACTOR_11 0x16000000 // 22-pole motor mechanical speed
#define FG_DIV_FACTOR_12 0x18000000 // 24-pole motor mechanical speed
#define FG_DIV_FACTOR_14 0x1A000000 // 26-pole motor mechanical speed
#define FG_DIV_FACTOR_15 0x1C000000 // 28-pole motor mechanical speed
#define FG_DIV_FACTOR_16 0x1E000000 // 30-pole motor mechanical speed

/* 24bit FG output configuration */
#define FG_CONFIG_THR 0x00000000 // FG active till speed drops below BEMF threshold defined by FG_BEMF_THR
#define FG_CONFIG_ALL 0x01000000  //  FG active as long as motor is driven

/* 23-21bit FG output BEMF threshold */
#define FG_BEMF_THR_1mV 0x00000000 // FG output BEMF threshold +- 1mV
#define FG_BEMF_THR_2mV 0x00200000 // FG output BEMF threshold +- 2mV
#define FG_BEMF_THR_5mV 0x00400000 // FG output BEMF threshold +- 5mV
#define FG_BEMF_THR_10mV 0x00600000 // FG output BEMF threshold +- 10mV
#define FG_BEMF_THR_20mV 0x00800000 // FG output BEMF threshold +- 20mV
#define FG_BEMF_THR_30mV 0x00A00000 // FG output BEMF threshold +- 30mV
#define FG_BEMF_THR_NA 0x00C00000 // FG output BEMF threshold NA

/* 20-18bit Motor stop method */
#define MTR_STOP_HiZ 0x00000000 // Motor stop method Hi-Z
#define MTR_STOP_Recirculation 0x00040000 // Motor stop method Recirculation
#define MTR_STOP_LowSideBraking 0x00080000 // Motor stop method Low-side Braking
#define MTR_STOP_HighSideBraking 0x000C0000 // Motor stop method High-side Braking
#define MTR_STOP_ActiveSpinDown 0x00100000 // Motor stop method Active Spin Down
#define MTR_STOP_NA 0x00140000 // Motor stop method NA

/* 17-14bit Brake time during motor stop */
#define MTR_STOP_BRK_TIME_1ms 0x00000000  // Brake time during motor stop 1ms
#define MTR_STOP_BRK_TIME_2ms 0x00004000  // Brake time during motor stop 2ms
#define MTR_STOP_BRK_TIME_5ms 0x00008000  // Brake time during motor stop 5ms
#define MTR_STOP_BRK_TIME_10ms 0x0000C000  // Brake time during motor stop 10ms
#define MTR_STOP_BRK_TIME_15ms 0x00010000  // Brake time during motor stop 15ms
#define MTR_STOP_BRK_TIME_25ms 0x00014000  // Brake time during motor stop 25ms
#define MTR_STOP_BRK_TIME_50ms 0x00018000  // Brake time during motor stop 50ms
#define MTR_STOP_BRK_TIME_75ms 0x0001C000 // Brake time during motor stop 75ms
#define MTR_STOP_BRK_TIME_100ms 0x00020000 // Brake time during motor stop 100ms
#define MTR_STOP_BRK_TIME_250ms 0x00024000 // Brake time during motor stop 250ms
#define MTR_STOP_BRK_TIME_500ms 0x00028000 // Brake time during motor stop 500ms
#define MTR_STOP_BRK_TIME_1000ms 0x0002C000 // Brake time during motor stop 1000ms
#define MTR_STOP_BRK_TIME_2500ms 0x00030000 // Brake time during motor stop 2500ms
#define MTR_STOP_BRK_TIME_5000ms 0x00034000 // Brake time during motor stop 5000ms
#define MTR_STOP_BRK_TIME_10000ms 0x00038000 // Brake time during motor stop 10000ms
#define MTR_STOP_BRK_TIME_15000ms 0x0003C000 // Brake time during motor stop 15000ms

/* 13-11bit Duty cycle threshold for motor stop using active spin down, low- and high-side braking */
#define ACT_SPIN_BRK_THR_IMMEDIATE 0x00000000 // Duty cycle threshold for motor stop using active spin down, low- and high-side braking immediate
#define ACT_SPIN_BRK_THR_50 0x00000800         // Duty cycle threshold for motor stop using active spin down, low- and high-side braking 50%
#define ACT_SPIN_BRK_THR_25 0x00001000         // Duty cycle threshold for motor stop using active spin down, low- and high-side braking 25%
#define ACT_SPIN_BRK_THR_15 0x00001800         // Duty cycle threshold for motor stop using active spin down, low- and high-side braking 15%
#define ACT_SPIN_BRK_THR_10 0x00002000         // Duty cycle threshold for motor stop using active spin down, low- and high-side braking 10%
#define ACT_SPIN_BRK_THR_7d5 0x00002800        // Duty cycle threshold for motor stop using active spin down, low- and high-side braking 7.5%
#define ACT_SPIN_BRK_THR_5 0x00003000          // Duty cycle threshold for motor stop using active spin down, low- and high-side braking 5%
#define ACT_SPIN_BRK_THR_2d5 0x00003800        // Duty cycle threshold for motor stop using active spin down, low- and high-side braking 2.5%

/* 10-8bit Duty cycle threshold for BRAKE pin based low-side braking */
#define BRAKE_DUTY_THRESHOLD_IMMEDIATE 0x00000000 // Duty cycle threshold for BRAKE pin based low-side braking immediate
#define BRAKE_DUTY_THRESHOLD_50 0x00000100         // Duty cycle threshold for BRAKE pin based low-side braking 50%
#define BRAKE_DUTY_THRESHOLD_25 0x00000200         // Duty cycle threshold for BRAKE pin based low-side braking 25%
#define BRAKE_DUTY_THRESHOLD_15 0x00000300       // Duty cycle threshold for BRAKE pin based low-side braking 15%
#define BRAKE_DUTY_THRESHOLD_10 0x00000400       // Duty cycle threshold for BRAKE pin based low-side braking 10%
#define BRAKE_DUTY_THRESHOLD_7d5 0x00000500        // Duty cycle threshold for BRAKE pin based low-side braking 7.5%
#define BRAKE_DUTY_THRESHOLD_5 0x00000600         // Duty cycle threshold for BRAKE pin based low-side braking 5%
#define BRAKE_DUTY_THRESHOLD_2d5 0x00000700       // Duty cycle threshold for BRAKE pin based low-side braking 2.5%

/* 7bit AVS enable */
#define AVS_DISABLE 0x00000000 // AVS disable
#define AVS_ENABLE 0x00000080  // AVS enable

/* 6-3bit Cycle by Cycle (CBC) current limit (CBC current limit (A) = CBC_ILIMIT / CSA_GAIN) */
#define CBC_ILIMIT_NA 0x00000000   // Cycle by Cycle current limit not applicable
#define CBC_ILIMIT_0d1V 0x00000008 // Cycle by Cycle current limit 0.1V
#define CBC_ILIMIT_0d2V 0x00000010 // Cycle by Cycle current limit 0.2V
#define CBC_ILIMIT_0d3V 0x00000018 // Cycle by Cycle current limit 0.3V
#define CBC_ILIMIT_0d4V 0x00000020 // Cycle by Cycle current limit 0.4V
#define CBC_ILIMIT_0d5V 0x00000028 // Cycle by Cycle current limit 0.5V
#define CBC_ILIMIT_0d6V 0x00000030 // Cycle by Cycle current limit 0.6V
#define CBC_ILIMIT_0d7V 0x00000038 // Cycle by Cycle current limit 0.7V
#define CBC_ILIMIT_0d8V 0x00000040 // Cycle by Cycle current limit 0.8V
#define CBC_ILIMIT_0d9V 0x00000048 // Cycle by Cycle current limit 0.9V
#define CBC_ILIMIT_1d0V 0x00000050 // Cycle by Cycle current limit 1.0V
#define CBC_ILIMIT_1d1V 0x00000058 // Cycle by Cycle current limit 1.1V
#define CBC_ILIMIT_1d2V 0x00000060 // Cycle by Cycle current limit 1.2V
#define CBC_ILIMIT_1d3V 0x00000068 // Cycle by Cycle current limit 1.3V
#define CBC_ILIMIT_1d4V 0x00000070 // Cycle by Cycle current limit 1.4V
#define CBC_ILIMIT_1d5V 0x00000078 // Cycle by Cycle current limit 1.5V

/* *** CLOSED_LOOP3 *** */
/* 30-29bit Number of samples needed for dynamic degauss check */
#define DYN_DGS_FILT_COUNT_2 0x00000000 // 2 samples needed for dynamic degauss check
#define DYN_DGS_FILT_COUNT_3 0x20000000 // 3 samples needed for dynamic degauss check
#define DYN_DGS_FILT_COUNT_4 0x40000000 // 4 samples needed for dynamic degauss check
#define DYN_DGS_FILT_COUNT_5 0x60000000 // 5 samples needed for dynamic degauss check

/* 28-27bit Dynamic degauss voltage upper bound */
#define DYN_DGS_UPPER_LIM_VM_0d09V 0x00000000 // Dynamic degauss voltage upper bound VM - 0.09V
#define DYN_DGS_UPPER_LIM_VM_0d12V 0x08000000  // Dynamic degauss voltage upper bound VM - 0.12V
#define DYN_DGS_UPPER_LIM_VM_0d15V 0x10000000  // Dynamic degauss voltage upper bound VM - 0.15V
#define DYN_DGS_UPPER_LIM_VM_0d18V 0x18000000  // Dynamic degauss voltage upper bound VM - 0.18V

/* 26-25bit Dynamic degauss voltage lower bound */
#define DYN_DGS_LOWER_LIM_0d03V 0x00000000 // Dynamic degauss voltage lower bound 0.03V
#define DYN_DGS_LOWER_LIM_0d06V 0x02000000 // Dynamic degauss voltage lower bound 0.06V
#define DYN_DGS_LOWER_LIM_0d09V 0x04000000 // Dynamic degauss voltage lower bound 0.09V
#define DYN_DGS_LOWER_LIM_0d12V 0x06000000 // Dynamic degauss voltage lower bound 0.12V

/* 24-23bit Number of BEMF samples per 30° below which commutation method switches from integration to ZC */
#define INTEG_CYCL_THR_LOW_3 0x00000000 // 3 samples per 30° (Number of BEMF samples per 30° below which commutation method switches from integration to ZC)
#define INTEG_CYCL_THR_LOW_4 0x00800000 // 4 samples per 30° (Number of BEMF samples per 30° below which commutation method switches from integration to ZC)
#define INTEG_CYCL_THR_LOW_6 0x01000000 // 6 samples per 30° (Number of BEMF samples per 30° below which commutation method switches from integration to ZC)
#define INTEG_CYCL_THR_LOW_8 0x01800000 // 8 samples per 30° (Number of BEMF samples per 30° below which commutation method switches from integration to ZC)

/* 22-21bit Number of BEMF samples per 30° above which commutation method switches from ZC to integration */
#define INTEG_CYCL_THR_HIGH_4 0x00000000 // 4 samples per 30° (Number of BEMF samples per 30° above which commutation method switches from ZC to integration)
#define INTEG_CYCL_THR_HIGH_6 0x00200000 // 6 samples per 30° (Number of BEMF samples per 30° above which commutation method switches from ZC to integration)
#define INTEG_CYCL_THR_HIGH_8 0x00400000 // 8 samples per 30° (Number of BEMF samples per 30° above which commutation method switches from ZC to integration)
#define INTEG_CYCL_THR_HIGH_10 0x00600000 // 10 samples per 30° (Number of BEMF samples per 30° above which commutation method switches from ZC to integration)

/* 20-19bit Duty cycle below which commutation method switches from integration to ZC */
#define INTEG_DUTY_THR_LOW_12 0x00000000 // 12% (Duty cycle below which commutation method switches from integration to ZC)
#define INTEG_DUTY_THR_LOW_15 0x00080000 // 15% (Duty cycle below which commutation method switches from integration to ZC)
#define INTEG_DUTY_THR_LOW_18 0x00100000 // 18% (Duty cycle below which commutation method switches from integration to ZC)
#define INTEG_DUTY_THR_LOW_20 0x00180000 // 20% (Duty cycle below which commutation method switches from integration to ZC)

/* 18-17bit Duty cycle above which commutation method switches from ZC to integration */
#define INTEG_DUTY_THR_HIGH_12 0x00000000 // 12% (Duty cycle above which commutation method switches from ZC to integration)
#define INTEG_DUTY_THR_HIGH_15 0x00020000 // 15% (Duty cycle above which commutation method switches from ZC to integration)
#define INTEG_DUTY_THR_HIGH_18 0x00040000 // 18% (Duty cycle above which commutation method switches from ZC to integration)
#define INTEG_DUTY_THR_HIGH_20 0x00060000 // 20% (Duty cycle above which commutation method switches from ZC to integration)

/* 16-11bit BEMF threshold for integration based commutation during falling floating phase voltage */
#define BEMF_THRESHOLD2_0 0x00000000    // BEMF threshold2 0
#define BEMF_THRESHOLD2_25 0x00000800   // BEMF threshold2 25
#define BEMF_THRESHOLD2_50 0x00001000   // BEMF threshold2 50
#define BEMF_THRESHOLD2_75 0x00001800   // BEMF threshold2 75
#define BEMF_THRESHOLD2_100 0x00002000  // BEMF threshold2 100
#define BEMF_THRESHOLD2_125 0x00002800  // BEMF threshold2 125
#define BEMF_THRESHOLD2_150 0x00003000  // BEMF threshold2 150
#define BEMF_THRESHOLD2_175 0x00003800  // BEMF threshold2 175
#define BEMF_THRESHOLD2_200 0x00004000  // BEMF threshold2 200
#define BEMF_THRESHOLD2_225 0x00004800  // BEMF threshold2 225
#define BEMF_THRESHOLD2_250 0x00005000  // BEMF threshold2 250
#define BEMF_THRESHOLD2_275 0x00005800  // BEMF threshold2 275
#define BEMF_THRESHOLD2_300 0x00006000  // BEMF threshold2 300
#define BEMF_THRESHOLD2_325 0x00006800  // BEMF threshold2 325
#define BEMF_THRESHOLD2_350 0x00007000  // BEMF threshold2 350
#define BEMF_THRESHOLD2_375 0x00007800  // BEMF threshold2 375
#define BEMF_THRESHOLD2_400 0x00008000  // BEMF threshold2 400
#define BEMF_THRESHOLD2_425 0x00008800  // BEMF threshold2 425
#define BEMF_THRESHOLD2_450 0x00009000  // BEMF threshold2 450
#define BEMF_THRESHOLD2_475 0x00009800  // BEMF threshold2 475
#define BEMF_THRESHOLD2_500 0x0000A000  // BEMF threshold2 500
#define BEMF_THRESHOLD2_525 0x0000A800  // BEMF threshold2 525
#define BEMF_THRESHOLD2_550 0x0000B000  // BEMF threshold2 550
#define BEMF_THRESHOLD2_575 0x0000B800  // BEMF threshold2 575
#define BEMF_THRESHOLD2_600 0x0000C000  // BEMF threshold2 600
#define BEMF_THRESHOLD2_625 0x0000C800  // BEMF threshold2 625
#define BEMF_THRESHOLD2_650 0x0000D000  // BEMF threshold2 650
#define BEMF_THRESHOLD2_675 0x0000D800  // BEMF threshold2 675
#define BEMF_THRESHOLD2_700 0x0000E000  // BEMF threshold2 700
#define BEMF_THRESHOLD2_725 0x0000E800  // BEMF threshold2 725
#define BEMF_THRESHOLD2_750 0x0000F000  // BEMF threshold2 750
#define BEMF_THRESHOLD2_775 0x0000F800  // BEMF threshold2 775
#define BEMF_THRESHOLD2_800 0x00010000  // BEMF threshold2 800
#define BEMF_THRESHOLD2_850 0x00010800  // BEMF threshold2 850
#define BEMF_THRESHOLD2_900 0x00011000  // BEMF threshold2 900
#define BEMF_THRESHOLD2_950 0x00011800  // BEMF threshold2 950
#define BEMF_THRESHOLD2_1000 0x00012000 // BEMF threshold2 1000
#define BEMF_THRESHOLD2_1050 0x00012800 // BEMF threshold2 1050
#define BEMF_THRESHOLD2_1100 0x00013000 // BEMF threshold2 1100
#define BEMF_THRESHOLD2_1150 0x00013800 // BEMF threshold2 1150
#define BEMF_THRESHOLD2_1200 0x00014000 // BEMF threshold2 1200
#define BEMF_THRESHOLD2_1250 0x00014800 // BEMF threshold2 1250
#define BEMF_THRESHOLD2_1300 0x00015000 // BEMF threshold2 1300
#define BEMF_THRESHOLD2_1350 0x00015800 // BEMF threshold2 1350
#define BEMF_THRESHOLD2_1400 0x00016000 // BEMF threshold2 1400
#define BEMF_THRESHOLD2_1450 0x00016800 // BEMF threshold2 1450
#define BEMF_THRESHOLD2_1500 0x00017000 // BEMF threshold2 1500
#define BEMF_THRESHOLD2_1550 0x00017800 // BEMF threshold2 1550
#define BEMF_THRESHOLD2_1600 0x00018000 // BEMF threshold2 1600
#define BEMF_THRESHOLD2_1700 0x00018800 // BEMF threshold2 1700
#define BEMF_THRESHOLD2_1800 0x00019000 // BEMF threshold2 1800
#define BEMF_THRESHOLD2_1900 0x00019800 // BEMF threshold2 1900
#define BEMF_THRESHOLD2_2000 0x0001A000 // BEMF threshold2 2000
#define BEMF_THRESHOLD2_2100 0x0001A800 // BEMF threshold2 2100
#define BEMF_THRESHOLD2_2200 0x0001B000 // BEMF threshold2 2200
#define BEMF_THRESHOLD2_2300 0x0001B800 // BEMF threshold2 2300
#define BEMF_THRESHOLD2_2400 0x0001C000 // BEMF threshold2 2400
#define BEMF_THRESHOLD2_2600 0x0001C800 // BEMF threshold2 2600
#define BEMF_THRESHOLD2_2800 0x0001D000 // BEMF threshold2 2800
#define BEMF_THRESHOLD2_3000 0x0001D800 // BEMF threshold2 3000
#define BEMF_THRESHOLD2_3200 0x0001E000 // BEMF threshold2 3200
#define BEMF_THRESHOLD2_3400 0x0001E800 // BEMF threshold2 3400
#define BEMF_THRESHOLD2_3600 0x0001F000 // BEMF threshold2 3600
#define BEMF_THRESHOLD2_3800 0x0001F800 // BEMF threshold2 3800

/* 10-5bit BEMF threshold for integration based commutation during rising floating phase voltage */
#define BEMF_THRESHOLD1_0 0x00000000    // BEMF threshold1 0
#define BEMF_THRESHOLD1_25 0x00000020   // BEMF threshold1 25
#define BEMF_THRESHOLD1_50 0x00000040   // BEMF threshold1 50
#define BEMF_THRESHOLD1_75 0x00000060   // BEMF threshold1 75
#define BEMF_THRESHOLD1_100 0x00000080  // BEMF threshold1 100
#define BEMF_THRESHOLD1_125 0x000000A0  // BEMF threshold1 125
#define BEMF_THRESHOLD1_150 0x000000C0  // BEMF threshold1 150
#define BEMF_THRESHOLD1_175 0x000000E0  // BEMF threshold1 175
#define BEMF_THRESHOLD1_200 0x00000100  // BEMF threshold1 200
#define BEMF_THRESHOLD1_225 0x00000120  // BEMF threshold1 225
#define BEMF_THRESHOLD1_250 0x00000140  // BEMF threshold1 250
#define BEMF_THRESHOLD1_275 0x00000160  // BEMF threshold1 275
#define BEMF_THRESHOLD1_300 0x00000180  // BEMF threshold1 300
#define BEMF_THRESHOLD1_325 0x000001A0  // BEMF threshold1 325
#define BEMF_THRESHOLD1_350 0x000001C0  // BEMF threshold1 350
#define BEMF_THRESHOLD1_375 0x000001E0  // BEMF threshold1 375
#define BEMF_THRESHOLD1_400 0x00000200  // BEMF threshold1 400
#define BEMF_THRESHOLD1_425 0x00000220  // BEMF threshold1 425
#define BEMF_THRESHOLD1_450 0x00000240  // BEMF threshold1 450
#define BEMF_THRESHOLD1_475 0x00000260  // BEMF threshold1 475
#define BEMF_THRESHOLD1_500 0x00000280  // BEMF threshold1 500
#define BEMF_THRESHOLD1_525 0x000002A0  // BEMF threshold1 525
#define BEMF_THRESHOLD1_550 0x000002C0  // BEMF threshold1 550
#define BEMF_THRESHOLD1_575 0x000002E0  // BEMF threshold1 575
#define BEMF_THRESHOLD1_600 0x00000300  // BEMF threshold1 600
#define BEMF_THRESHOLD1_625 0x00000320  // BEMF threshold1 625
#define BEMF_THRESHOLD1_650 0x00000340  // BEMF threshold1 650
#define BEMF_THRESHOLD1_675 0x00000360  // BEMF threshold1 675
#define BEMF_THRESHOLD1_700 0x00000380  // BEMF threshold1 700
#define BEMF_THRESHOLD1_725 0x000003A0  // BEMF threshold1 725
#define BEMF_THRESHOLD1_750 0x000003C0  // BEMF threshold1 750
#define BEMF_THRESHOLD1_775 0x000003E0  // BEMF threshold1 775
#define BEMF_THRESHOLD1_800 0x00000400  // BEMF threshold1 800
#define BEMF_THRESHOLD1_850 0x00000420  // BEMF threshold1 850
#define BEMF_THRESHOLD1_900 0x00000440  // BEMF threshold1 900
#define BEMF_THRESHOLD1_950 0x00000460  // BEMF threshold1 950
#define BEMF_THRESHOLD1_1000 0x00000480 // BEMF threshold1 1000
#define BEMF_THRESHOLD1_1050 0x000004A0 // BEMF threshold1 1050
#define BEMF_THRESHOLD1_1100 0x000004C0 // BEMF threshold1 1100
#define BEMF_THRESHOLD1_1150 0x000004E0 // BEMF threshold1 1150
#define BEMF_THRESHOLD1_1200 0x00000500 // BEMF threshold1 1200
#define BEMF_THRESHOLD1_1250 0x00000520 // BEMF threshold1 1250
#define BEMF_THRESHOLD1_1300 0x00000540 // BEMF threshold1 1300
#define BEMF_THRESHOLD1_1350 0x00000560 // BEMF threshold1 1350
#define BEMF_THRESHOLD1_1400 0x00000580 // BEMF threshold1 1400
#define BEMF_THRESHOLD1_1450 0x000005A0 // BEMF threshold1 1450
#define BEMF_THRESHOLD1_1500 0x000005C0 // BEMF threshold1 1500
#define BEMF_THRESHOLD1_1550 0x000005E0 // BEMF threshold1 1550
#define BEMF_THRESHOLD1_1600 0x00000600 // BEMF threshold1 1600
#define BEMF_THRESHOLD1_1700 0x00000620 // BEMF threshold1 1700
#define BEMF_THRESHOLD1_1800 0x00000640 // BEMF threshold1 1800
#define BEMF_THRESHOLD1_1900 0x00000660 // BEMF threshold1 1900
#define BEMF_THRESHOLD1_2000 0x00000680 // BEMF threshold1 2000
#define BEMF_THRESHOLD1_2100 0x000006A0 // BEMF threshold1 2100
#define BEMF_THRESHOLD1_2200 0x000006C0 // BEMF threshold1 2200
#define BEMF_THRESHOLD1_2300 0x000006E0 // BEMF threshold1 2300
#define BEMF_THRESHOLD1_2400 0x00000700 // BEMF threshold1 2400
#define BEMF_THRESHOLD1_2600 0x00000720 // BEMF threshold1 2600
#define BEMF_THRESHOLD1_2800 0x00000740 // BEMF threshold1 2800
#define BEMF_THRESHOLD1_3000 0x00000760 // BEMF threshold1 3000
#define BEMF_THRESHOLD1_3200 0x00000780 // BEMF threshold1 3200
#define BEMF_THRESHOLD1_3400 0x000007A0 // BEMF threshold1 3400
#define BEMF_THRESHOLD1_3600 0x000007C0 // BEMF threshold1 3600
#define BEMF_THRESHOLD1_3800 0x000007E0 // BEMF threshold1 3800

/* 4bit Commutation method select */
#define INTEG_ZC_METHOD_ZC_Based 0x00000000 // Zero crossing based
#define INTEG_ZC_METHOD_Integartion_Based 0x00000010 // Integration based

/* 3-1bit Maximum degauss window */
#define DEGAUSS_MAX_WIN_22d5 0x00000000 // Maximum degauss window 22.5 degree
#define DEGAUSS_MAX_WIN_10 0x00000002   // Maximum degauss window 10 degree
#define DEGAUSS_MAX_WIN_15 0x00000004  // Maximum degauss window 15 degree
#define DEGAUSS_MAX_WIN_18 0x00000006  // Maximum degauss window 18 degree
#define DEGAUSS_MAX_WIN_30 0x00000008  // Maximum degauss window 30 degree
#define DEGAUSS_MAX_WIN_37d5 0x0000000A  // Maximum degauss window 37.5 degree
#define DEGAUSS_MAX_WIN_45 0x0000000C  // Maximum degauss window 45 degree
#define DEGAUSS_MAX_WIN_60 0x0000000E  // Maximum degauss window 60 degree

/* 0bit Dynamic degauss detection */
#define DYN_DEGAUSS_EN 0x00000001  // Dynamic degauss detection enable
#define DYN_DEGAUSS_DIS 0x00000000 // Dynamic degauss detection disable

/* *** CLOSED_LOOP4 *** */

/* *** CONST_SPEED *** */

/* 19-8bit Speed/ Power loop Ki (Ki = SPD_LOOP_KI / 10000) */
/* 7-5bit Upper saturation limit for speed/ power loop */
#define SPD_POWER_V_MAX_100 0x00000000 // Upper saturation limit for speed/ power loop 100%
#define SPD_POWER_V_MAX_95 0x00000020  // Upper saturation limit for speed/ power loop 95%
#define SPD_POWER_V_MAX_90 0x00000040  // Upper saturation limit for speed/ power loop 90%
#define SPD_POWER_V_MAX_85 0x00000060  // Upper saturation limit for speed/ power loop 85%
#define SPD_POWER_V_MAX_80 0x00000080  // Upper saturation limit for speed/ power loop 80%
#define SPD_POWER_V_MAX_75 0x000000A0  // Upper saturation limit for speed/ power loop 75%
#define SPD_POWER_V_MAX_70 0x000000C0  // Upper saturation limit for speed/ power loop 70%
#define SPD_POWER_V_MAX_65 0x000000E0  // Upper saturation limit for speed/ power loop 65%

/* 4-2bit Lower saturation limit for speed/power loop */
#define SPD_POWER_V_MIN_0 0x00000000   // Lower saturation limit for speed/power loop 0%
#define SPD_POWER_V_MIN_2d5 0x00000004 // Lower saturation limit for speed/power loop 2.5%
#define SPD_POWER_V_MIN_5 0x00000008   // Lower saturation limit for speed/power loop 5%
#define SPD_POWER_V_MIN_7d5 0x0000000C // Lower saturation limit for speed/power loop 7.5%
#define SPD_POWER_V_MIN_10 0x00000010  // Lower saturation limit for speed/power loop 10%
#define SPD_POWER_V_MIN_15 0x00000014  // Lower saturation limit for speed/power loop 15%
#define SPD_POWER_V_MIN_20 0x00000018  // Lower saturation limit for speed/power loop 20%
#define SPD_POWER_V_MIN_25 0x0000001C  // Lower saturation limit for speed/power loop 25%

/* 1-0bit Closed loop mode */
#define CLOSED_LOOP_MODE_DIS 0x00000000       // closed loop mode disable
#define CLOSED_LOOP_MODE_SPEEDLOOP 0x00000001 // Speed loop
#define CLOSED_LOOP_MODE_POWERLOOP 0x00000002 // Power loop
#define CLOSED_LOOP_MODE_RESERVED 0x00000003  // Reserved


/* *** TRAP_CONFIG1 *** */
/* 23-22bit Open loop handoff cycles */
#define OPEN_LOOP_HANDOFF_CYCLES_3 0x00000000 // Open loop handoff cycles 3
#define OPEN_LOOP_HANDOFF_CYCLES_6 0x00400000 // Open loop handoff cycles 6
#define OPEN_LOOP_HANDOFF_CYCLES_12 0x00800000 // Open loop handoff cycles 12
#define OPEN_LOOP_HANDOFF_CYCLES_24 0x00C00000 // Open loop handoff cycles 24

/* ***  FAULT_CONFIG1 *** */
/* 29-27bit No motor detect deglitch time */

/* 6-3bit Motor lock mode */
#define MTR_LCK_MODE_0 0x00000000 //  Motor lock detection causes latched fault; nFAULT active; Gate driver is tristated (default)
#define MTR_LCK_MODE_1 0x00000008 //  Motor lock detection causes latched fault; nFAULT active; Gate driver is in recirculation mode
#define MTR_LCK_MODE_2 0x00000010 //  Motor lock detection causes latched fault; nFAULT active; Gate driver is in high-side brake mode (All high-side FETs are turned ON)
#define MTR_LCK_MODE_3 0x00000018 //   Motor lock detection causes latched fault; nFAULT active; Gate driver is in low-side brake mode (All low-side FETs are turned ON)
#define MTR_LCK_MODE_4 0x00000020 //   Automatic recovery after tLCK_RETRY; Gate driver is tristated
#define MTR_LCK_MODE_5 0x00000028 //   Automatic recovery after tLCK_RETRY; Gate driver is in recirculation mode
#define MTR_LCK_MODE_6 0x00000030 //   Automatic recovery after tLCK_RETRY; Gate driver is in highside brake mode (All high-side FETs are turned ON)
#define MTR_LCK_MODE_7 0x00000038 //   Automatic recovery after tLCK_RETRY; Gate driver is in lowside brake mode (All low-side FETs are turned ON)
#define MTR_LCK_MODE_8 0x00000040 //   Motor lock detection is in report only but no action is taken
#define MTR_LCK_MODE_9 0x00000048 //   Motor lock detection is disabled

/* *** FAULT_CONFIG2 *** */
/* 30bit Lock 1 (Abnormal Speed) Enable */
#define LOCK1_EN 0x40000000  // Lock 1 (Abnormal Speed) Enable
#define LOCK1_DIS 0x00000000 // Lock 1 (Abnormal Speed) Disable

/* 29bit Lock 2 (Loss of Sync) Enable */
#define LOCK2_EN 0x20000000  // Lock 2 (Loss of Sync) Enable
#define LOCK2_DIS 0x00000000 // Lock 2 (Loss of Sync) Disable

/* 28bit Lock 3 (No Motor) Enable */
#define LOCK3_EN 0x10000000  // Lock 3 (No Motor) Enable
#define LOCK3_DIS 0x00000000 // Lock 3 (No Motor) Disable

/* 27-24bit Abnormal speed lock threshold */
#define LOCK_ABN_SPEED_250Hz 0x00000000  // Abnormal speed lock threshold 250Hz
#define LOCK_ABN_SPEED_500Hz 0x01000000  // Abnormal speed lock threshold 500Hz
#define LOCK_ABN_SPEED_750Hz 0x02000000  // Abnormal speed lock threshold 750Hz
#define LOCK_ABN_SPEED_1000Hz 0x03000000 // Abnormal speed lock threshold 1000Hz
#define LOCK_ABN_SPEED_1250Hz 0x04000000 // Abnormal speed lock threshold 1250Hz
#define LOCK_ABN_SPEED_1500Hz 0x05000000 // Abnormal speed lock threshold 1500Hz
#define LOCK_ABN_SPEED_1750Hz 0x06000000 // Abnormal speed lock threshold 1750Hz
#define LOCK_ABN_SPEED_2000Hz 0x07000000 // Abnormal speed lock threshold 2000Hz
#define LOCK_ABN_SPEED_2250Hz 0x08000000 // Abnormal speed lock threshold 2250Hz
#define LOCK_ABN_SPEED_2500Hz 0x09000000 // Abnormal speed lock threshold 2500Hz
#define LOCK_ABN_SPEED_2750Hz 0x0A000000 // Abnormal speed lock threshold 2750Hz
#define LOCK_ABN_SPEED_3000Hz 0x0B000000 // Abnormal speed lock threshold 3000Hz
#define LOCK_ABN_SPEED_3250Hz 0x0C000000 // Abnormal speed lock threshold 3250Hz
#define LOCK_ABN_SPEED_3500Hz 0x0D000000 // Abnormal speed lock threshold 3500Hz
#define LOCK_ABN_SPEED_3750Hz 0x0E000000 // Abnormal speed lock threshold 3750Hz
#define LOCK_ABN_SPEED_4000Hz 0x0F000000 // Abnormal speed lock threshold 4000Hz

/* 23-21bit Number of times sync lost for loss of sync lock fault */
#define LOSS_SYNC_TIMES_2 0x00000000 // Trigger after losing sync 2 times
#define LOSS_SYNC_TIMES_3 0x00200000 // Trigger after losing sync 3 times
#define LOSS_SYNC_TIMES_4 0x00400000 // Trigger after losing sync 4 times
#define LOSS_SYNC_TIMES_5 0x00600000 // Trigger after losing sync 5 times
#define LOSS_SYNC_TIMES_6 0x00800000 // Trigger after losing sync 6 times
#define LOSS_SYNC_TIMES_7 0x00A00000 // Trigger after losing sync 7 times
#define LOSS_SYNC_TIMES_8 0x00C00000 // Trigger after losing sync 8 times
#define LOSS_SYNC_TIMES_9 0x00E00000 // Trigger after losing sync 9 times

/* 20-18bit  No motor lock current threshold (No motor lock current threshold (A) = NO_MTR_THR / CSA_GAIN) */
#define NO_MTR_THR_0d005V 0x00000000  // No motor lock current threshold 0.005V
#define NO_MTR_THR_0d01V 0x00040000   // No motor lock current threshold 0.01V
#define NO_MTR_THR_0d0125V 0x00080000 // No motor lock current threshold 0.0125V
#define NO_MTR_THR_0d020V 0x000C0000  // No motor lock current threshold 0.02V
#define NO_MTR_THR_0d025V 0x00100000  // No motor lock current threshold 0.025V
#define NO_MTR_THR_0d03V 0x00140000   // No motor lock current threshold 0.03V
#define NO_MTR_THR_0d04V 0x00180000   // No motor lock current threshold 0.04V

/* *** PIN_CONFIG1 *** */
/* 2-1bit Speed input configuration */
#define SPD_CTRL_MODE_ANALOG 0x00000000 // Speed control mode analog mode speed Input
#define SPD_CTRL_MODE_PWM 0x00000002    // Speed control mode PWM mode speed Input
#define SPD_CTRL_MODE_IIC 0x00000004    // Speed control mode IIC mode speed Input
#define SPD_CTRL_MODE_FREQ 0x00000006   // Speed control mode frequency mode speed Input

/* *** PIN_CONFIG2 *** */
/* 30-29bit Pin 36 configuration */
#define DAC_SOX_CONFIG_DACOUT2 0x00000000 // DACOUT2
#define DAC_SOX_CONFIG_SOA 0x20000000     // SOA
#define DAC_SOX_CONFIG_SOB 0x40000000     // SOB
#define DAC_SOX_CONFIG_SOC 0x60000000     // SOC

/* 27bit Pin 37 and pin 38 configuration */
#define DAC_XTAL_CONFIG_NA 0x00000000     // NA
#define DAC_XTAL_CONFIG_DACOUT 0x08000000 // Pin 37 as DACOUT1 and pin 38 as DACOUT2

/* *** GD_CONFIG1 *** */
/* 27-26bit Slew rate */
#define SLEW_RATE_25Vus 0x00000000  // Slew rate 25V/us
#define SLEW_RATE_50Vus 0x04000000  // Slew rate 50V/us
#define SLEW_RATE_125Vus 0x08000000 // Slew rate 125V/us
#define SLEW_RATE_200Vus 0x0C000000 // Slew rate 200V/us

/* 1-0bit Current Sense Amplifier (CSA) Gain */
#define CSA_GAIN_0d15VA 0x00000000 // Current Sense Amplifier (CSA) Gain 0.15V/A
#define CSA_GAIN_0d3VA 0x00000001  // Current Sense Amplifier (CSA) Gain 0.3V/A
#define CSA_GAIN_0d6VA 0x00000002  // Current Sense Amplifier (CSA) Gain 0.6V/A
#define CSA_GAIN_1d2VA 0x00000003  // Current Sense Amplifier (CSA) Gain 1.2V/A

/* *** SYS_STATUS2 *** */
/* 31-28bit Current status of state machine; 4-bit value indicating status of state machine*/
#define STATE_SYSTEM_IDLE 0x00000000     // System idle
#define STATE_MOTOR_START 0x10000000     // Motor start
#define STATE_MOTOR_RUN 0x20000000       // Motor run
#define STATE_SYSTEM_INIT 0x30000000     // System initialization
#define STATE_MOTOR_IPD 0x40000000       // Motor in position detection
#define STATE_MOTOR_ALIGN 0x50000000     // Motor alignment
#define STATE_MOTOR_IDLE 0x60000000      // Motor IDLE
#define STATE_MOTOR_STOP 0x70000000      // Motor stop
#define STATE_FAULT 0x80000000           // fault
#define STATE_MOTOR_DIRECTION 0x90000000 // Motor direction
#define STATE_HALL_ALIGN 0xA0000000      // Hall alignment
#define STATE_MOTOR_FREEWHEEL 0xC0000000 // Motor freewheel
#define STATE_MOTOR_DESCEL 0xD0000000    // Motor deceleration
#define STATE_MOTOR_BREAK 0xE0000000     // Motor Break
#define STATE_NA 0xF0000000              // NA

/* 15-0bit Speed output (/10 to get motor electrical speed in Hz) */
#define SPEED_OUTPUT 0xFFFF // Speed output = (SYS_STATUS2[15:0] & SPEED_OUTPUT) / 10

/* *** ALGO_CTRL1 *** */
/* 31bit Write the configuration to EEPROM , 1h = Write to the EEPROM registers from shadow registers*/
#define EEPROM_WRT 0x80000000 // Write the configuration to EEPROM

/* 30bit Read the default configuration from EEPROM , 1h = Read the EEPROM registers to shadow registers */
#define EEPROM_READ 0x40000000 // Read the default configuration from EEPROM

#endif